30 lines
1.2 KiB
Markdown
30 lines
1.2 KiB
Markdown
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来源：STM32 Cortex®-M4 MCUs and MPUs Programming Manual Rev 10，Page 18
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2.1.3
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Core registers
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**Figure 2. Processor core registers**
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**Table 2. Summary of processor mode, execution privilege level, and stack usage**
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| Processor mode | Used to execute | Privilege level for software execution | Stack used |
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|----------------|-----------------|---------------------------------------|------------|
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| Thread | Applications | Privileged or unprivileged (1) | Main stack or process stack (1) |
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| Handler | Exception handlers | Always privileged | Main stack |
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1. See CONTROL register on page 25.
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**Table 3. Core register set summary**
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| Name | Type (1) | Required privilege (2) | Reset value | Description |
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|------|----------|------------------------|-------------|-------------|
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| R0-R12 | read-write | Either | Unknown | General-purpose registers on page 19 |
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| MSP | read-write | Privileged | See description | Stack pointer on page 19 |
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| PSP | read-write | Either | Unknown | Stack pointer on page 19 |
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| LR | read-write | Either | 0xFFFFFFFF | Link register on page 19 |
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| PC | read-write | Either | See description | Program counter on page 19 |
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> 原始图片：imgs/page_18_fig_2.png
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