output-v2/3.5_Instruction_summary_p52.md

来源：STM32 Cortex®-M4 MCUs and MPUs Programming Manual Rev 10，Page 52

The STM32 Cortex-M4 instruction set

| Mnemonic | Operands | Brief description | Flags | Page |
|----------|----------|-------------------|-------|------|
| LDREXB | Rt, [Rn] | Load register exclusive with byte | — | 3.4.8 on page 79 |
| LDREXH | Rt, [Rn] | Load register exclusive with halfword | — | 3.4.8 on page 79 |
| LDRH, LDRHT | Rt, [Rn, #offset] | Load register with halfword | — | 3.4 on page 69 |
| LDRSB, LDRSBT | Rt, [Rn, #offset] | Load register with signed byte | — | 3.4 on page 69 |
| LDRSH, LDRSHT | Rt, [Rn, #offset] | Load register with signed halfword | — | 3.4 on page 69 |
| LDRT | Rt, [Rn, #offset] | Load register with word | — | 3.4 on page 69 |
| LSL, LSLS | Rd, Rm, <Rs\|#n> | Logical shift left | N,Z,C | 3.5.3 on page 86 |
| LSR, LSRS | Rd, Rm, <Rs\|#n> | Logical shift right | N,Z,C | 3.5.3 on page 86 |
| MLA | Rd, Rn, Rm, Ra | Multiply with accumulate, 32-bit result | — | 3.6.1 on page 110 |
| MLS | Rd, Rn, Rm, Ra | Multiply and subtract, 32-bit result | — | 3.6.1 on page 110 |
| MOV, MOVS | Rd, Op2 | Move | N,Z,C | 3.5.6 on page 89 |
| MOVT | Rd, #imm16 | Move top | — | 3.5.7 on page 91 |
| MOVW, MOV | Rd, #imm16 | Move 16-bit constant | N,Z,C | 3.5.6 on page 89 |
| MRS | Rd, spec_reg | Move from special register to general register | — | 3.11.6 on page 186 |
| MSR | spec_reg, Rm | Move from general register to special register | N,Z,C,V | 3.11.7 on page 187 |
| MUL, MULS | {Rd,} Rn, Rm | Multiply, 32-bit result | N,Z | 3.6.1 on page 110 |
| MVN, MVNS | Rd, Op2 | Move NOT | N,Z,C | 3.5.6 on page 89 |
| NOP | — | No operation | — | 3.11.8 on page 188 |
| ORN, ORNS | {Rd,} Rn, Op2 | Logical OR NOT | N,Z,C | 3.5.2 on page 85 |
| ORR, ORRS | {Rd,} Rn, Op2 | Logical OR | N,Z,C | 3.5.2 on page 85 |
| PKHTB, PKHBT | {Rd,} Rn, Rm, Op2 | Pack Halfword | — | 3.8.1 on page 135 |
| POP | reglist | Pop registers from stack | — | 3.4.7 on page 78 |
| PUSH | reglist | Push registers onto stack | — | 3.4.7 on page 78 |
| QADD | {Rd,} Rn, Rm | Saturating double and add | — | 3.7.3 on page 128 |
| QADD16 | {Rd,} Rn, Rm | Saturating add 16 | — | 3.7.3 on page 128 |
| QADD8 | {Rd,} Rn, Rm | Saturating add 8 | — | 3.7.3 on page 128 |
| QASX | {Rd,} Rn, Rm | Saturating add and subtract with exchange | — | 3.7.4 on page 129 |
| QSAX | {Rd,} Rn, Rm | Saturating subtract and add with exchange | — | 3.7.4 on page 129 |
| QSUB | {Rd,} Rn, Rm | Saturating subtract | — | 3.7.3 on page 128 |
| QSUB16 | {Rd,} Rn, Rm | Saturating subtract 16 | — | 3.7.3 on page 128 |
| QSUB8 | {Rd,} Rn, Rm | Saturating subtract 8 | — | 3.7.3 on page 128 |
| RBIT | Rd, Rm | Reverse bits | — | 3.5.8 on page 92 |
| REV | Rd, Rm | Reverse byte order in a word | — | 3.5.8 on page 92 |
| REV16 | Rd, Rm | Reverse byte order in each halfword | — | 3.5.8 on page 92 |
| REVSH | Rd, Rm | Reverse byte order in bottom halfword and sign extend | — | 3.5.8 on page 92 |
| ROR, RORS | Rd, Rm, <Rs\|#n> | Rotate right | N,Z,C | 3.5.3 on page 86 |
| RRX, RRXS | Rd, Rm | Rotate right with extend | N,Z,C | 3.5.3 on page 86 |
| SADDSUBX | {Rd,} Rn, Rm | Signed add and subtract with exchange | — | 3.7.4 on page 129 |
| SADD8 | {Rd,} Rn, Rm | Signed add 8 | — | 3.7.4 on page 129 |
| SADD16 | {Rd,} Rn, Rm | Signed add 16 | — | 3.7.4 on page 129 |
| SASX | {Rd,} Rn, Rm | Signed add and subtract with exchange | — | 3.7.4 on page 129 |
| SBC, SBCS | {Rd,} Rn, Op2 | Subtract with carry | N,Z,C,V | 3.5.5 on page 88 |
| SBFX | Rd, Rn, #lsb, #width | Signed bit field extract | — | 3.9.2 on page 140 |
| SDIV | {Rd,} Rn, Rm | Signed divide | — | 3.5.9 on page 93 |
| SEL | {Rd,} Rn, Rm | Select bytes | — | 3.7.4 on page 129 |
| SEV | — | Send event | — | 3.11.9 on page 189 |
| SHADD8 | {Rd,} Rn, Rm | Signed halving add 8 | — | 3.7.4 on page 129 |
| SHADD16 | {Rd,} Rn, Rm | Signed halving add 16 | — | 3.7.4 on page 129 |
| SHASX | {Rd,} Rn, Rm | Signed halving add and subtract with exchange | — | 3.7.4 on page 129 |
| SHSAX | {Rd,} Rn, Rm | Signed halving subtract and add with exchange | — | 3.7.4 on page 129 |
| SHSUB8 | {Rd,} Rn, Rm | Signed halving subtract 8 | — | 3.7.4 on page 129 |
| SHSUB16 | {Rd,} Rn, Rm | Signed halving subtract 16 | — | 3.7.4 on page 129 |
| SMLAD | {Rd,} Rn, Rm, Ra | Signed multiply accumulate long (halfwords) | — | 3.6.2 on page 111 |
| SMLADX | {Rd,} Rn, Rm, Ra | Signed multiply accumulate long (halfwords) | — | 3.6.2 on page 111 |
| SMLAL | RdLo, RdHi, Rn, Rm | Signed multiply with accumulate (32x32=64) | — | 3.6.1 on page 110 |
| SMLALBB | RdLo, RdHi, Rn, Rm | Signed multiply accumulate long (16x16=64) | — | 3.6.2 on page 111 |
| SMLALD | RdLo, RdHi, Rn, Rm | Signed multiply accumulate long (32x32=64) | — | 3.6.2 on page 111 |
| SMLALDX | RdLo, RdHi, Rn, Rm | Signed multiply accumulate long (32x32=64) | — | 3.6.2 on page 111 |
| SMLAWB | {Rd,} Rn, Rm, Ra | Signed multiply accumulate long (32x16=48) | — | 3.6.2 on page 111 |
| SMLAWT | {Rd,} Rn, Rm, Ra | Signed multiply accumulate long (32x16=48) | — | 3.6.2 on page 111 |
| SMLSD | {Rd,} Rn, Rm, Ra | Signed multiply subtract difference long | — | 3.6.2 on page 111 |
| SMLSDX | {Rd,} Rn, Rm, Ra | Signed multiply subtract difference long | — | 3.6.2 on page 111 |
| SMLSLD | RdLo, RdHi, Rn, Rm | Signed multiply subtract long | — | 3.6.2 on page 111 |
| SMLSLDX | RdLo, RdHi, Rn, Rm | Signed multiply subtract long | — | 3.6.2 on page 111 |
| SMMLA | {Rd,} Rn, Rm, Ra | Signed most significant word multiply accumulate | — | 3.6.2 on page 111 |
| SMMLAR | {Rd,} Rn, Rm, Ra | Signed most significant word multiply accumulate | — | 3.6.2 on page 111 |
| SMMLS | {Rd,} Rn, Rm, Ra | Signed most significant word multiply subtract | — | 3.6.2 on page 111 |
| SMMLSR | {Rd,} Rn, Rm, Ra | Signed most significant word multiply subtract | — | 3.6.2 on page 111 |
| SMMUL | {Rd,} Rn, Rm | Signed most significant word multiply | — | 3.6.2 on page 111 |
| SMMULR | {Rd,} Rn, Rm | Signed most significant word multiply | — | 3.6.2 on page 111 |
| SMUAD | {Rd,} Rn, Rm | Signed dual multiply add | — | 3.6.2 on page 111 |
| SMUADX | {Rd,} Rn, Rm | Signed dual multiply add | — | 3.6.2 on page 111 |
| SMULBB | {Rd,} Rn, Rm | Signed halfword multiply | — | 3.6.2 on page 111 |
| SMULBT | {Rd,} Rn, Rm | Signed halfword multiply | — | 3.6.2 on page 111 |

**Table 21. Cortex-M4 instructions (continued)**

| Mnemonic | Operands | Brief description | Flags | Page |
|----------|----------|-------------------|-------|------|

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