45 lines
2.1 KiB
Markdown
45 lines
2.1 KiB
Markdown
|
# 2.1.3 Core registers
|
|||
|
|
|
|||
|
|
## Figure 2. Processor core registers
|
|||
|
|
|
|||
|
|
> 原始图片：imgs/page_18_fig_2.png
|
|||
|
|
|
|||
|
|
**寄存器示意图**（Figure 2）：
|
|||
|
|
- 顶部显示 **PSR**（Program Status Register，含 APSR、EPSR、IPSR 三个子寄存器）
|
|||
|
|
- 中部显示 **PRIMASK**、**FAULTMASK**、**BASEPRI**、**CONTROL** 等特殊寄存器
|
|||
|
|
- 底部显示 **SP**（含 MSP 和 PSP）、**LR**、**PC** 以及 **R0-R12** 通用寄存器
|
|||
|
|
|
|||
|
|
---
|
|||
|
|
|
|||
|
|
## Table 2. Summary of processor mode, execution privilege level, and stack usage
|
|||
|
|
|
|||
|
|
| Processor mode | Used to execute | Privilege level for software execution | Stack used |
|
|||
|
|
|----------------|-----------------|---------------------------------------|------------|
|
|||
|
|
| Thread | Applications | Privileged or unprivileged (1) | Main stack or process stack (1) |
|
|||
|
|
| Handler | Exception handlers | Always privileged | Main stack |
|
|||
|
|
|
|||
|
|
> 1. See CONTROL register on page 25.
|
|||
|
|
|
|||
|
|
---
|
|||
|
|
|
|||
|
|
## Table 3. Core register set summary
|
|||
|
|
|
|||
|
|
| Name | Type (1) | Required privilege (2) | Reset value | Description |
|
|||
|
|
|------|----------|------------------------|-------------|-------------|
|
|||
|
|
| R0-R12 | read-write | Either | Unknown | General-purpose registers on page 19 |
|
|||
|
|
| MSP | read-write | Privileged | See description | Stack pointer on page 19 |
|
|||
|
|
| PSP | read-write | Either | Unknown | Stack pointer on page 19 |
|
|||
|
|
| LR | read-write | Either | 0xFFFFFFFF | Link register on page 19 |
|
|||
|
|
| PC | read-write | Either | See description | Program counter on page 19 |
|
|||
|
|
|
|||
|
|
> 1. Type 列中的 "read-write" 表示该寄存器可被程序读写访问。
|
|||
|
|
> 2. Required privilege 列表示操作该寄存器所需的权限级别："Privileged" 仅允许特权模式，"Either" 表示特权模式和用户模式均可操作。
|
|||
|
|
|
|||
|
|
---
|
|||
|
|
|
|||
|
|
**说明**：本页面包含 3 个核心内容元素：
|
|||
|
|
1. **Figure 2** — 处理器核心寄存器示意图，展示各寄存器的层次结构与从属关系
|
|||
|
|
2. **Table 2** — 处理器模式、执行特权级、栈使用情况的概览表
|
|||
|
|
3. **Table 3** — 核心寄存器集的功能与属性汇总表
|
|||
|
|
|
|||
|
|
来源：STM32 Cortex®-M4 MCUs and MPUs Programming Manual Rev 10，Page 18
|