test: PDF洗MD v5 第二批测试 — 12页（含寄存器/代码/位域表）

新增6页：p18(寄存器+Table)/p20-p21(PSR双图+APSR位域)/p197(MPU汇编)/p237-238(CFSR/UFSR位域描述)
原有6页：p1封面/p2目录/p12-p13正文/p51-p52指令表

Co-Authored-By: Claude <noreply@anthropic.com>

output-v2/2.1.3_Core_registers_p18.md

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+来源：STM32 Cortex®-M4 MCUs and MPUs Programming Manual Rev 10，Page 18
+
+2.1.3
+Core registers
+
+**Figure 2. Processor core registers**
+
+![图 2](imgs/page_18_fig_2.png)
+
+**Table 2. Summary of processor mode, execution privilege level, and stack usage**
+
+| Processor mode | Used to execute | Privilege level for software execution | Stack used |
+|----------------|-----------------|---------------------------------------|------------|
+| Thread | Applications | Privileged or unprivileged (1) | Main stack or process stack (1) |
+| Handler | Exception handlers | Always privileged | Main stack |
+
+1. See CONTROL register on page 25.
+
+**Table 3. Core register set summary**
+
+| Name | Type (1) | Required privilege (2) | Reset value | Description |
+|------|----------|------------------------|-------------|-------------|
+| R0-R12 | read-write | Either | Unknown | General-purpose registers on page 19 |
+| MSP | read-write | Privileged | See description | Stack pointer on page 19 |
+| PSP | read-write | Either | Unknown | Stack pointer on page 19 |
+| LR | read-write | Either | 0xFFFFFFFF | Link register on page 19 |
+| PC | read-write | Either | See description | Program counter on page 19 |
+
+> 原始图片：imgs/page_18_fig_2.png