test: PDF洗MD v5 第二批测试 — 12页（含寄存器/代码/位域表）

新增6页：p18(寄存器+Table)/p20-p21(PSR双图+APSR位域)/p197(MPU汇编)/p237-238(CFSR/UFSR位域描述)
原有6页：p1封面/p2目录/p12-p13正文/p51-p52指令表

Co-Authored-By: Claude <noreply@anthropic.com>

source/page_237.txt

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+PM0214 Rev 10
+237/262
+PM0214
+Core peripherals
+261
+4.4.10 
+Configurable fault status register (CFSR; UFSR+BFSR+MMFSR)
+Address offset: 0x28
+Reset value: 0x0000 0000
+Required privilege: Privileged
+The following subsections describe the subregisters that make up the CFSR:
+•
+Usage fault status register (UFSR) on page 238
+•
+Bus fault status register (BFSR) on page 239
+•
+Memory management fault address register (MMFSR) on page 240
+The CFSR is byte accessible. You can access the CFSR or its subregisters as follows:
+•
+Access the complete CFSR with a word access to 0xE000ED28
+•
+Access the MMFSR with a byte access to 0xE000ED28
+•
+Access the MMFSR and BFSR with a halfword access to 0xE000ED28
+•
+Access the BFSR with a byte access to 0xE000ED29
+•
+Access the UFSR with a halfword access to 0xE000ED2A.
+The CFSR indicates the cause of a memory management fault, bus fault, or usage fault.
+Figure 20. CFSR subregisters
+          
+          
+Memory Management 
+Fault Status Register
+31
+16 15
+8
+7
+0
+Usage Fault Status Register
+Bus Fault Status 
+Register
+UFSR
+BFSR
+MMFSR
+31
+30
+29
+28
+27
+26
+25
+24
+23
+22
+21
+20
+19
+18
+17
+16
+Reserved
+DIVBY 
+ZERO
+UNALI
+GNED
+Reserved
+NOCP
+INVPC
+INV 
+STATE
+UNDEF
+INSTR
+rc_w1
+rc_w1
+rc_w1
+rc_w1
+rc_w1
+rc_w1
+15
+14
+13
+12
+11
+10
+9
+8
+7
+6
+5
+4
+3
+2
+1
+0
+BFARV
+ALID
+Reserv
+ed
+LSP 
+ERR
+STK 
+ERR
+UNSTK 
+ERR
+IMPRE
+CIS 
+ERR
+PRECI
+S ERR
+IBUS 
+ERR
+MMAR
+VALID
+Reserv
+ed
+MLSP
+ERR
+MSTK 
+ERR
+M 
+UNSTK 
+ERR
+Res.
+DACC 
+VIOL
+IACC 
+VIOL
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+rw
+Bits 31:16 UFSR: see Usage fault status register (UFSR) on page 238
+Bits 15:8 BFSR: see Bus fault status register (BFSR) on page 239
+Bits 7:0 MMFSR: see Memory management fault address register (MMFSR) on page 240